1. Field of the Invention
This invention relates to amplifiers in general and, more particularly, to power microwave amplifiers.
2. Description of the Prior Art
Solid-state microwave power amplifiers have been traditionally limited to low power applications, particularly at high microwave frequencies, such as X band (approximately 12 GHz) and above. For more output power than a few watts, traveling wave tubes (TWTs) are predominately used at these frequencies. In certain applications, such as in aircraft or satellites, TWTs may not be suitable because of size, excess weight, and high power consumption (low efficiency). Hence, it is preferable that the power amplifier be of a solid-state variety since they are inherently smaller, have less weight, and have higher efficiency than TWTs--up to certain power levels and frequencies. When, for example, an X band amplifier is needed that can provide more than five watts, existing solid-state technologies are pushed to, or beyond, their limits.
Gallium arsenide technology is the most practical of existing solid-state device technologies for microwave power amplifiers. Other technologies, such as silicon or indium phosphide, are either too inefficient at microwave frequencies or not sufficiently developed for commercial manufacture. Active gallium arsenide microwave devices are basically of two types: heterojunction field-effect transistors (HFETs) or recessed gate junction field-effect transistors (JFET); heterojunction bipolar transistor (HBT) technology is, as yet, too immature for microwave power amplifier applications. However, individual HFET or JFET devices can only provide several hundred milliwatts, not watts, at X band frequencies. Hence, a technique of coupling the devices together must used to achieve the desired output power.
To achieve the desired output power from solid-state (HFET or JFET) amplifiers, it is desirable that the signals from the individual amplifiers (gain-stages) be combined such that the power from each is added together with minimal loss. One such technique involves hybrid combiners which split the signal to be amplified into multiple outputs which, in turn, couple to the corresponding inputs of the gain-stages. The outputs from the stages are then recombined in another hybrid and the output thereof has the amplified signal thereon. It is critical, however, to make sure that the signal paths through the hybrids and individual amplifier stages have substantially the same delay or phase shift, otherwise the overall gain (or efficiency) of the hybrids/gain-stage combination will be degraded. A somewhat complicated technique which helps compensate for phase-shift mismatch is shown in U.S. Pat. No. 4,656,434. Hybrids are typically large and may have undesirable weight, making compact amplifiers impractical.
Another technique for combining individual gain-stages into an amplifier is to parallel the gain-stages by "brute force". This involves directly paralleling the stages (usually individual transistors) until the desired output power is achieved. This technique is especially advantageous when combined with integrated circuit fabrication technologies to fabricate several transistors in a common substrate. The "brute force" technique is utilized to some extent, as will be discussed below. However, as frequencies increase, the physical size (equivalent to delay, discussed below) in the circuitry used to interconnect the transistors (typically transmission lines) becomes a significant fraction of the wavelength of the signal to be amplified. At high microwave frequencies, such as X band frequencies, the amplified signals from each transistor (gain-stage) may be significantly mismatched in phase, measured at the output of the amplifier, leading to excessive loss when combined. This lowers the overall efficiency of the amplifier, possibly rendering the amplifier unsuitable as a power amplifier. For example, for an eight gain-stage amplifier operating at 12 GHz, similar to that disclosed in FIG. 1 of Japanese patent 54-141566, and shown in simplified form in FIG. 3, the combining loss (ignoring losses in the metal interconnect which forms a transmission line) is estimated to be about 0.03 dB. Similarly, the combining loss for an eight stage amplifier, similar to that disclosed in FIG. 2 of the above-identified Japanese patent, and shown in simplified form in FIG. 4, is estimated to be about 0.1 dB. The above examples, and the method of calculating the losses therein, will be described in more detail below.